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a623308a series 8k x 8 bit cmos sram (july, 2006, version 1.0) amic technology, corp. document title 8k x 8 bit cmos sram revision history rev. no. history issue date remark 0.0 initial issue novem ber 9, 2004 preliminary 1.0 remove non-pb-free package type july 3, 2006 final final version release
a623308a series preliminary 8k x 8 bit cmos sram (july, 2006, version 1.0) 1 amic technology, corp. features ? power supply range: 4.5v to 5.5v ? access times: 70 ns a623308a-s series: operating: 35ma (max.) standby: 10 a (max.) a623308a-si/su series: operating: 35ma (max.) standby: 15 a (max.) ? extended operating te mperature range: 0 c to 70 c for - s series, -25 c to 85 c for -si series, -40 c to 85 c for -su series. ? full static operation, no cl ock or refreshing required ? all inputs and outputs are directly ttl-compatible ? common i/o using three-state output ? data retention voltage: 2.0v (min.) ? available in 28-pin, dip/sop and tsop ? pb-free package only ? all pb-free (lead-free) pr oducts are rohs compliant general description the a623308a is a low operati ng current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5v to 5.5v. inputs and three-st ate outputs are ttl compatible and allow for direct interfacing with common system bus structures. minimum standby power is drawn by this device when ce is at a high level, independent of the other input levels. data retention is guaranteed at a power supply voltage as low as 2.0v. pin configurations ? dip / sop ? tsop ~ ~ a623308av 1 9 28 20 a11 2 3 4 5 6 7 8 10 11 12 13 14 a9 a8 nc nc a12 a7 a6 a5 a4 a3 27 26 25 24 23 22 21 19 18 17 16 15 i/o 6 i/o 5 i/o 4 i/o 3 vss i/o 2 i/o 1 i/o 0 a0 a1 a2 a10 vcc i/o 7 oe we ce ~ ~ nc a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o 0 i/o 1 i/o 2 gnd i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 ce oe a11 a9 a8 nc we vcc a10 a623308a(m) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
a623308a series (july, 2006, version 1.0) 2 amic technology, corp. block diagram row decoder 128 x 512 memory array input data circuit column i/o control circuit ce we i/o 7 i/o 0 a12 a11 a10 a0 vcc gnd oe pin descriptions ? dip / sop pin no. symbol description 1, 26 nc no connection 2-10, 21, 23-25 a0 - a12 address input 11-13, 15-19 i/o 0 - i/o 7 data input/output 20 ce chip enable 22 oe output enable 27 we write enable 28 vcc power supply 14 gnd ground pin description-tsop pin no. symbol description 5, 8 nc no connection 2-4, 9-17, 28 a0 - a12 address input 18-20, 22-26 i/o 0 - i/o 7 data input/output 27 ce chip enable 1 oe output enable 6 we write enable 7 vcc power supply 21 gnd ground
a623308a series (july, 2006, version 1.0) 3 amic technology, corp. recommended dc operating conditions (t a = 0 c to +70 c, -25 c to +85 c or -40 c to +85 c) symbol parameter min. typ. max. unit vcc supply voltage 4.5 5.0 5.5 v gnd ground 0 0 0 v v ih input high voltage 2.2 - vcc + 0.5 v v il input low voltage -0.5 0 +0.8 v absolute maximum ratings* vcc to gnd . . . . . . . . . . . . . . . . . . . . . . -0.5v to +7.0v in, in/out volt to gnd . . . . . . . . . -0.5v to vcc + 0.5v operating temperature, topr ??????????? ??????????.. 0 c to +70 c or -40 c to +85 c storage temperature, tstg . . . . . . . . -55 c to +125 c power dissipation, p t . . . . . . . . . . . . . . . . . . . . . . 0.7w soldering temp. & time . . . . . . . . . . . . . 260 c, 10 sec *comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only. functional operation of this device at these or any ot her conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics (t a = 0 c to +70 c, -25 c to +85 c or -40 c to +85 c, vcc = 5.0v 10%, gnd = 0v) symbol parameter a623308a-70s a623308a-70si/su unit conditions min. max. min. max. ? i li ? input leakage current - 1 - 1 a v in = gnd to vcc ? i lo ? output leakage current - 1 - 1 a ce = v ih v i/o = gnd to vcc i cc active power supply current - 5 - 5 ma ce = v il , i i/o = 0ma i cc1 dynamic operating current - 35 - 35 ma min. cycle, duty = 100% ce = v il , i i/o = 0ma i cc2 dynamic operating current - 5 - 5 ma ce = v il , v ih = vcc v il = 0v, f = 1 mhz i i/o = 0 ma i sb supply current - 0.5 - 0.5 ma ce = v ih i sb1 standby power - 10 - 15 a ce vcc - 0.2v v in 0v v ol output low voltage - 0.4 - 0.4 v i ol = 2.1 ma v oh output high voltage 2.4 - 2.4 - v i oh = -1.0 ma
a623308a series (july, 2006, version 1.0) 4 amic technology, corp. truth table mode ce oe we i/o operation supply current standby h x x high z i sb , i sb1 output disable l h h high z i cc , i cc1 , i cc2 read l l h d out i cc , i cc1 , i cc2 write l x l d in i cc , i cc1 , i cc2 note: x: h or l capacitance (t a = 25 c, f = 1.0 mhz) symbol parameter min. max. unit conditions c in * input capacitance - 6 pf v in = 0v c i/o * input/output capacitance - 8 pf v i/o = 0v * these parameters are sampled and not 100% tested.
a623308a series (july, 2006, version 1.0) 5 amic technology, corp. ac characteristics (t a = 0 c to +70 c, -25 c to +85 c or -40 c to +85 c, vcc = 5.0v 10%) symbol parameter a623308a-70s/si/su unit min. max. read cycle t rc read cycle time 70 - ns t aa address access time - 70 ns t ace chip enable access time - 70 ns t oe output enable to output valid - 35 ns t clz chip enable to output in low z 10 - ns t olz output enable to output in low z 5 - ns t chz chip disable to output in high z - 25 ns t ohz output disable to output in high z - 25 ns t oh output hold from address change 10 - ns write cycle t wc write cycle time 70 - ns t cw chip enable to end of write 60 - ns t as address set up time 0 - ns t aw address valid to end of write 60 - ns t wp write pulse width 50 - ns t wr write recovery time 0 - ns t whz write to output in high z - 25 ns t dw data to write time overlap 30 - ns t dh data hold from write time 0 - ns t ow output active from end of write 5 - ns notes: t chz , t ohz and t whz are defined as the time at which the output s achieve the open circuit condition and are not referred to output voltage levels.
a623308a series (july, 2006, version 1.0) 6 amic technology, corp. timing waveforms read cycle 1 (1) t rc t aa t oh address d out t ohz 5 t chz 5 t ace t clz 5 t olz 5 t oe ce oe read cycle 2 (1, 2, 4) t rc t oh t aa t oh address d out
a623308a series (july, 2006, version 1.0) 7 amic technology, corp. timing waveforms (continued) read cycle 3 (1, 3, 4) t clz 5 t ace t chz 5 ce d out notes: 1. we is high for read cycle. 2. device is continuously enabled, ce = v il . 3. address valid prior to or coincident with ce transition low. 4. oe = v il . 5. transition is measured 500mv from steady state. this parameter is sampled and not 100% tested. write cycle 1 (6) (write enable controlled) t wc address ce d in t ow 7 t dh t dw t whz 7 t wp 2 t as 1 (4) t cw 5 t aw t wr 3 we d out
a623308a series (july, 2006, version 1.0) 8 amic technology, corp. timing waveforms (continued) write cycle 2 (6) (chip enable controlled) t wc address ce d in t dh t dw (4) t cw 5 t aw t wr 3 we d out t whz 7 t wp 2 t as 1 notes: 1. t as is measured from the address valid to the beginning of write. 2. a write occurs during the overlap (t wp ) of a low ce and a low we . 3. t wr is measured form the earliest of ce or we going high to the end of the write cycle. 4. if the ce low transition occurs simultaneously with the we low transition or after the we transition, outputs remain in a high impedance state. 5. t cw is measured from the later of ce going low to the end of write. 6. oe level is high or low. 7. transition is measured 500mv from steady. this parameter is sampled and not 100% tested.
a623308a series (july, 2006, version 1.0) 9 amic technology, corp. ac test conditions input pulse levels 0v, 3v input rise and fall time 5 ns input and output timing reference levels 1.5v output load see figure 1 and 2 30pf * including scope and jig. * including scope and jig. c l ttl 5pf c l ttl figure 1. output load figure 2. output load for t clz1 , t clz2 , t ohz , t olz , t chz1 , t chz2 , t whz , and t ow data retention characteristics (t a = 0 c to +70 c, -25 c to +85 c or -40 c to +85 c) symbol parameter min. max. unit conditions v dr vcc for data retention 2.0 5.5 v ce vcc - 0.2v i ccdr data retention current - 3 a vcc = 2.0v, ce vcc - 0.2v v in 0v t cdr chip disable to data retention time 0 - ns t r operation recovery time t rc - ns see retention waveform
a623308a series (july, 2006, version 1.0) 10 amic technology, corp. low vcc data retention waveform vcc t cdr v ih 4.5v t r v ih 4.5v data retention mode v dr 2.0v ce v dr - 0.2v ce ordering information part no. access time (ns) operating current max. (ma) standby current max. ( a ) package A623308A-70SF 35 10 28l pb-free dip a623308am-70sf 35 10 28l pb-free sop a623308av-70sf 35 10 28l pb-free tsop (forward) a623308a-70sif 35 15 28l pb-free dip a623308am-70sif 35 15 28l pb-free sop a623308av-70sif 35 15 28l pb-free tsop (forward) a623308a-70suf 35 15 28l pb-free dip a623308am-70suf 35 15 28l pb-free sop a623308av-70suf 70 35 15 28l pb-free tsop (forward)
a623308a series (july, 2006, version 1.0) 11 amic technology, corp. package information p-dip 28l outline dimensions unit: inches/mm 1 28 e 1 s a 2 a l e e a d c b 1 b a 1 base plane seating plane 14 15 e 1 dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.210 - - 5.33 a 1 0.010 - - 0.25 - - a 2 0.150 0.155 0.160 3.81 3.94 4.06 b 0.016 0.018 0.022 0.41 0.46 0.56 b 1 0.058 0.060 0.064 1.47 1.52 1.63 c 0.008 0.010 0.014 0.20 0.25 0.36 d - 1.460 1.470 - 37.08 37.34 e 0.590 0.600 0.610 14.99 15.24 15.49 e 1 0.540 0.545 0.550 13.72 13.84 13.97 e 1 0.090 0.100 0.110 2.29 2.54 2.79 l 0.120 0.130 0.140 3.05 3.30 3.56 0 - 15 0 - 15 e a 0.630 0.650 0.670 16.00 16.51 17.02 s - - 0.090 - - 2.29 notes: 1. the maximum value of dimension d includes end flash. 2. dimension e 1 does not include resin fins. 3. dimension s includes end flash.
a623308a series (july, 2006, version 1.0) 12 amic technology, corp. package information sop (w.b.) 28l outline dimensions unit: inches/mm 1 e h l l 1 c 14 see detail f detail f b 15 28 a 1 a 2 a s d seating plane d y e y dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.112 - - 2.85 a 1 0.004 - - 0.10 - - a 2 0.093 0.098 0.103 2.36 2.49 2.62 b 0.014 0.016 0.020 0.36 0.41 0.51 c 0.008 0.010 0.012 0.20 0.25 0.30 d - 0.713 0.728 - 18.11 18.49 e 0.326 0.331 0.336 8.28 8.41 8.53 e 0.044 0.050 0.056 1.12 1.27 1.42 h 0.453 0.465 0.477 11.51 11.81 12.12 l 0.028 0.036 0.044 0.71 0.91 1.12 l 1 0.059 0.067 0.075 1.50 1.70 1.91 s - - 0.047 - - 1.19 y - - 0.004 - - 0.10 0 - 8 0 - 8 notes: 1. the maximum value of dimension d includes end flash. 2. dimension e does not include resin fins. 3. dimension s includes end flash.
a623308a series (july, 2006, version 1.0) 13 amic technology, corp. package information tsop 28l type i (8 x 13.4mm) outline dimensions unit: inches/mm dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.049 - - 1.25 a 1 0.002 - - 0.05 - - a 2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.17 0.22 0.27 c 0.005 - 0.008 0.12 - 0.21 e 0.311 0.315 0.319 7.90 8.00 8.10 l 0.012 0.020 0.028 0.30 0.50 0.70 d 0.520 0.528 0.536 13.20 13.40 13.60 d 1 0.461 0.465 0.469 11.70 11.80 11.90 e 0.022 bsc 0.55 bsc s 0.017 typ 0.425 typ y - - 0.004 - - 0.10 0 - 5 0 - 5 notes: 1. the maximum value of dimension d 1 includes end flash. 2. dimension e does not include resin fins. 3. dimension s includes end flash. d 1 e e d l a a 2 c detail "a" d y detail "a" s a 1 b 28 15 1 14

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